Transistor Tested Devices

QBQ14 QAQ101 QAQ201 QAQ203 QAQ208 QAQ209 QAQ210 QAQ211 QAQ212 QAQ213
QAQ250 QAQ251 QGQ23 QGQX10 QGQX11 QGQX12 QGQX13 QO1Q171 QOQ202 QOQ203
QOQ300 QOQ310 QOQ760 QOQ761 QPQ111 QPQ114 QPQ122 QPQ123 QPQ133 QPQ134
QPQ142 QPQ143 QPQ211 QPQ212 QPQ221 QPQ222 QPQ304 QPQ306 QPQ403 QPQ404
QPQ410 QPQ506 QPQ511 QPQ512 QPQ515 QPQ516 QPQ520 QPQ521 QPQ522 QPQ523
QPQ532 QPQ533 QPQ601 QPQ602 QPQ603 QPQ604 QPQ605 QPQ606 QPQ607 QPQ608
QPQ609 QPQ610 QPQ611 QPQ612 QPQ613 QPQ620 QPQ621 QPQ622 QPQ624 QPQ625
QPQ705 QPQ706 QPQ707 QPQ709 QPQ710 QPQ711 QPQ712 QPQ771 QPQ801 QPQ803
QPQ805 QPQ806 QPQ807 QPQ808 QPQ809 QPQ810 QPQ811 QPQ815 QPU702 QSQ1
QSQ2 QSQ46 QSQ6 QSQ9 QSQ901 QSQ902 QSQ903 QSQ905 QSQ906 QSQ907
QUQ700 QUQ702 QUQ703 QUQ705 QUQ730 QUQ750 QUQ751 QUQ756 QUQ757 QUQ759

QBQ14
Device Loc Side Total Pin Tested Coverage (%) Comment
QBQ14 C2 T 3 3 100.0  

Pin Nail Net Name
1 678 N41678282
2 1 GND
3 521 S_PME_

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2164 QBQ14_1_2 0.700V 0.700V 0 Q 678 1 0 0.910V 0.490V 0.780V 0.0003 249.33 152.21 0.9100 0.4900  
2165 QBQ14_2_3 1.500V 0.300V 4 Q 521 1 678 0.390V Ignore 0.050V 0.0007 40.582 71.731 0.3900 0.2100  
2166 QBQ14_3_1 0.700V 0.700V 0 Q 678 521 0 0.910V 0.490V 0.780V 0.0003 262.30 165.96 0.9100 0.4900  

QAQ101
Device Loc Side Total Pin Tested Coverage (%) Comment
QAQ101 B1 T 3 3 100.0  

Pin Nail Net Name
1 593 AUDIO_LED_PWM
2 1 GND
3 616 AULED_GND1

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2120 QAQ101_1_2 3000.0pF 500.00pF 2 C 593 1 0 Ignore 350.00pF 987.22pF 0.9405 53.164 119.52 650.00 350.00  
2121 QAQ101_2_3_1 5.000V 0.300V 4 Q 1 616 593 0.390V Ignore 0.030V 0.0007 41.511 82.224 0.3900 0.2100  
2122 QAQ101_3_1(N) 0.700V 0.700V 0 Q 1 616 0 0.910V 0.490V 0.610V 0.0055 12.727 7.3430 0.9100 0.4900  
2123 QAQ101_3_1(N) 3000.0pF 30.00pF 2 C 593 616 0 Ignore 21.00pF 0.61pF 0.0055 12.727 7.3430 0.9100 0.4900  

QAQ201
Device Loc Side Total Pin Tested Coverage (%) Comment
QAQ201 A1 T 3 3 100.0  

Pin Nail Net Name
1 50 MUTE_POP_R
2 8 A_LOUT_L_L
3 9 AMP_OUT_L

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2124 QAQ201_1_2 3000.0pF 400.00pF 2 C 50 8 0 Ignore 280.00pF 411.08pF 0.3263 122.60 111.28 520.00 280.00  
2125 QAQ201_2_3_1 5.000V 0.300V 4 Q 8 9 50 0.390V Ignore 0.060V 0.0010 28.829 49.347 0.3900 0.2100  
2126 QAQ201_3_1(N) 0.700V 0.700V 1 Q 8 9 0 0.910V 0.490V 0.720V 0.0007 96.586 88.595 0.9100 0.4900  
2127 QAQ201_3_1(N) 3000.0pF 300.00pF 2 C 50 9 0 Ignore 210.00pF 0.72pF 0.0007 96.586 88.595 0.9100 0.4900  

QAQ203
Device Loc Side Total Pin Tested Coverage (%) Comment
QAQ203 A1 T 3 3 100.0  

Pin Nail Net Name
1 50 MUTE_POP_R
2 6 A_LOUT_R_L
3 15 AMP_OUT_R

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2128 QAQ203_1_2 3000.0pF 500.00pF 2 C 50 6 0 Ignore 350.00pF 507.02pF 52.318 0.9560 0.9110 650.00 350.00  
2129 QAQ203_2_3_1 5.000V 0.300V 4 Q 6 15 50 0.390V Ignore 0.040V 0.0013 23.982 44.022 0.3900 0.2100  
2130 QAQ203_3_1(N) 0.700V 0.700V 1 Q 6 15 0 0.910V 0.490V 0.670V 0.0106 6.6290 5.7490 0.9100 0.4900  
2131 QAQ203_3_1(N) 3000.0pF 300.00pF 2 C 50 15 0 Ignore 210.00pF 0.67pF 0.0106 6.6290 5.7490 0.9100 0.4900  

QAQ208
Device Loc Side Total Pin Tested Coverage (%) Comment
QAQ208 A1 T 3 3 100.0  

Pin Nail Net Name
1 50 MUTE_POP_R
2 39 A_HPOUT_L_A
3 55 A_HPOUT_L_Q

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2132 QAQ208_1_2 3000.0pF 300.00pF 2 C 50 39 0 Ignore 210.00pF 1013.65pF 13.192 2.2740 15.758 390.00 210.00  
2133 QAQ208_2_3_1 5.000V 0.300V 4 Q 39 55 50 0.390V Ignore 0.140V 0.0188 1.5950 1.1750 0.3900 0.2100  
2134 QAQ208_3_1(N) 0.700V 0.700V 0 Q 39 55 0 0.910V 0.490V 0.580V 0.0002 308.12 126.80 0.9100 0.4900  
2135 QAQ208_3_1(N) 3000.0pF 200.00pF 2 C 50 55 0 Ignore 140.00pF 0.58pF 0.0002 308.12 126.80 0.9100 0.4900  

QAQ209
Device Loc Side Total Pin Tested Coverage (%) Comment
QAQ209 A1 T 3 3 100.0  

Pin Nail Net Name
1 50 MUTE_POP_R
2 37 A_HPOUT_L_L
3 55 A_HPOUT_L_Q

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2136 QAQ209_1_2 3000.0pF 330.00pF 2 C 50 37 0 Ignore 231.00pF 366.61pF 0.2560 128.89 81.230 429.00 231.00  
2137 QAQ209_2_3_1 5.000V 0.700V 4 Q 37 55 50 0.910V Ignore 0.080V 0.0074 9.4810 18.609 0.9100 0.4900  
2138 QAQ209_3_1(N) 0.700V 0.700V 1 Q 37 55 0 0.910V 0.490V 0.710V 0.0240 2.9160 2.8200 0.9100 0.4900  
2139 QAQ209_3_1(N) 3000.0pF 130.00pF 2 C 50 55 0 Ignore 91.00pF 0.71pF 0.0240 2.9160 2.8200 0.9100 0.4900  

QAQ210
Device Loc Side Total Pin Tested Coverage (%) Comment
QAQ210 A1 T 3 3 100.0  

Pin Nail Net Name
1 50 MUTE_POP_R
2 40 A_HPOUT_R_A
3 63 A_HPOUT_R_Q

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2140 QAQ210_1_2 3000.0pF 300.00pF 2 C 50 40 0 Ignore 210.00pF 1001.15pF 1.3470 22.271 151.23 390.00 210.00  
2141 QAQ210_2_3_1 5.000V 0.300V 4 Q 40 63 50 0.390V Ignore 0.110V 0.0109 2.7520 2.9240 0.3900 0.2100  
2142 QAQ210_3_1(N) 0.700V 0.700V 1 Q 40 63 0 0.910V 0.490V 0.700V 0.0011 60.972 59.909 0.9100 0.4900  
2143 QAQ210_3_1(N) 3000.0pF 150.00pF 2 C 50 63 0 Ignore 105.00pF 0.70pF 0.0011 60.972 59.909 0.9100 0.4900  

QAQ211
Device Loc Side Total Pin Tested Coverage (%) Comment
QAQ211 A1 T 3 3 100.0  

Pin Nail Net Name
1 50 MUTE_POP_R
2 36 A_HPOUT_R_L
3 63 A_HPOUT_R_Q

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2144 QAQ211_1_2 3000.0pF 300.00pF 2 C 50 36 0 Ignore 210.00pF 372.40pF 0.1336 224.63 43.934 390.00 210.00  
2145 QAQ211_2_3_1 5.000V 0.300V 4 Q 36 63 50 0.390V Ignore 0.070V 0.0015 20.342 31.845 0.3900 0.2100  
2146 QAQ211_3_1(N) 0.700V 0.700V 1 Q 36 63 0 0.910V 0.490V 0.680V 0.0168 4.1720 3.8270 0.9100 0.4900  
2147 QAQ211_3_1(N) 3000.0pF 120.00pF 2 C 50 63 0 Ignore 84.00pF 0.68pF 0.0168 4.1720 3.8270 0.9100 0.4900  

QAQ212
Device Loc Side Total Pin Tested Coverage (%) Comment
QAQ212 A1 T 3 3 100.0  

Pin Nail Net Name
1 50 MUTE_POP_R
2 11 A_VREF_MIC1_L_Q
3 21 A_VREF_MIC1_L

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2148 QAQ212_1_2 3000.0pF 400.00pF 2 C 50 11 0 Ignore 280.00pF 974.77pF 50.202 0.7970 3.0200 520.00 280.00  
2149 QAQ212_2_3_1 5.000V 0.300V 4 Q 11 21 50 0.390V Ignore 0.030V 0.0012 24.278 48.752 0.3900 0.2100  
2150 QAQ212_3_1(N) 0.700V 0.700V 1 Q 11 21 0 0.910V 0.490V 0.660V 0.0024 28.583 22.678 0.9100 0.4900  
2151 QAQ212_3_1(N) 3000.0pF 150.00pF 2 C 50 21 0 Ignore 105.00pF 0.66pF 0.0024 28.583 22.678 0.9100 0.4900  

QAQ213
Device Loc Side Total Pin Tested Coverage (%) Comment
QAQ213 A1 T 3 3 100.0  

Pin Nail Net Name
1 50 MUTE_POP_R
2 10 A_VREF_MIC1_R_Q
3 22 A_VREF_MIC1_R

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2152 QAQ213_1_2 3000.0pF 400.00pF 2 C 50 10 0 Ignore 280.00pF 531.32pF 48.965 0.8170 0.0770 520.00 280.00  
2153 QAQ213_2_3_1 5.000V 0.700V 4 Q 10 22 50 0.910V Ignore 0.030V 0.0013 55.405 121.49 0.9100 0.4900  
2154 QAQ213_3_1(N) 0.700V 0.700V 1 Q 10 22 0 0.910V 0.490V 0.690V 0.0071 9.8370 9.5890 0.9100 0.4900  
2155 QAQ213_3_1(N) 3000.0pF 160.00pF 2 C 50 22 0 Ignore 112.00pF 0.69pF 0.0071 9.8370 9.5890 0.9100 0.4900  

QAQ250
Device Loc Side Total Pin Tested Coverage (%) Comment
QAQ250 A1 T 3 3 100.0  

Pin Nail Net Name
1 49 A_EAPD
2 1 GND
3 68 N16996174

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2156 QAQ250_1_2 3000.0pF 200.00pF 2 C 49 1 0 Ignore 140.00pF 708.67pF 11.727 1.7050 12.753 260.00 140.00  
2157 QAQ250_2_3_1 5.000V 0.700V 4 Q 1 68 49 0.910V Ignore 0.030V 0.0005 150.25 330.65 0.9100 0.4900  
2158 QAQ250_3_1(N) 0.700V 0.700V 0 Q 1 68 0 0.910V 0.490V 0.630V 0.0004 158.65 104.38 0.9100 0.4900  
2159 QAQ250_3_1(N) 3000.0pF 30.00pF 2 C 49 68 0 Ignore 21.00pF 0.63pF 0.0004 158.65 104.38 0.9100 0.4900  

QAQ251
Device Loc Side Total Pin Tested Coverage (%) Comment
QAQ251 A1 T 3 3 100.0  

Pin Nail Net Name
1 66 MUTE_POP_EN
2 1 GND
3 67 MUTE_POP

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2160 QAQ251_1_2 3000.0pF 3000.0pF 2 C 66 1 0 Ignore 2100.0pF 20712.6pF 1.4439 207.77 3881.3 3900.0 2100.0  
2161 QAQ251_2_3_1 5.000V 0.700V 4 Q 1 67 66 0.910V Ignore 0.300V 0.0044 15.990 14.479 0.9100 0.4900  
2162 QAQ251_3_1(N) 0.700V 0.700V 0 Q 66 67 0 0.910V 0.490V 0.790V 0.0009 78.366 46.466 0.9100 0.4900  
2163 QAQ251_3_1(N) 3000.0pF 3000.0pF 2 C 66 67 0 Ignore 2100.0pF 0.8pF 0.0009 78.366 46.466 0.9100 0.4900  

QGQ23
Device Loc Side Total Pin Tested Coverage (%) Comment
QGQ23 E1 T 3 3 100.0  

Pin Nail Net Name
1 4 +12V
2 3 +5V
3 1012 +5V_DVI_HDMI_Q

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2167 QGQ23_1_2 3000.0pF 300.00pF 2 C 4 3 0 Ignore 210.00pF 1028.42pF 0.2654 113.02 801.72 390.00 210.00  
2168 QGQ23_2_3_1(N 5.000V 0.300V 4 Q 3 1012 4 0.390V Ignore 0.220V 0.0011 27.094 1.7670 0.3900 0.2100  
2169 QGQ23_3_1 0.700V 0.700V 0 Q 4 1012 0 0.910V 0.490V 0.660V 0.0005 133.44 110.25 0.9100 0.4900  
2170 QGQ23_3_1 3000.0pF 300.00pF 2 C 4 1012 0 Ignore 210.00pF 0.66pF 0.0005 133.44 110.25 0.9100 0.4900  

QGQX10
Device Loc Side Total Pin Tested Coverage (%) Comment
QGQX10 E1 T 3 3 100.0  

Pin Nail Net Name
1 2 +3V
2 167 S_DVI_DDC_DATA
3 1008 SW_DVI_DDC_DATA

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2171 QGQX10_1_2 3000.0pF 600.00pF 2 C 2 167 0 Ignore 420.00pF 695.09pF 0.2741 218.87 103.24 780.00 420.00  
2172 QGQX10_2_3_1 5.000V 0.700V 4 Q 167 1008 2 0.910V Ignore 0.360V 0.0058 12.007 7.5360 0.9100 0.4900  
2173 QGQX10_3_1(N) 0.700V 0.700V 0 Q 167 1008 0 0.910V 0.490V 0.620V 0.0003 253.82 157.38 0.9100 0.4900  
2174 QGQX10_3_1(N) 3000.0pF 300.00pF 2 C 2 1008 0 Ignore 210.00pF 0.62pF 0.0003 253.82 157.38 0.9100 0.4900  

QGQX11
Device Loc Side Total Pin Tested Coverage (%) Comment
QGQX11 E1 T 3 3 100.0  

Pin Nail Net Name
1 2 +3V
2 670 S_DVI_DDC_CLK
3 1009 SW_DVI_DDC_CLK

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2175 QGQX11_1_2 3000.0pF 400.00pF 2 C 2 670 0 Ignore 280.00pF 720.01pF 16.737 2.3900 3.9840 520.00 280.00  
2176 QGQX11_2_3_1 5.000V 0.300V 4 Q 670 1009 2 0.390V Ignore 0.300V 0.0050 5.9680 5.7020 0.3900 0.2100  
2177 QGQX11_3_1(N) 0.700V 0.700V 1 Q 670 1009 0 0.910V 0.490V 0.740V 0.0005 133.65 109.96 0.9100 0.4900  
2178 QGQX11_3_1(N) 3000.0pF 300.00pF 2 C 2 1009 0 Ignore 210.00pF 0.74pF 0.0005 133.65 109.96 0.9100 0.4900  

QGQX12
Device Loc Side Total Pin Tested Coverage (%) Comment
QGQX12 E1 T 3 3 100.0  

Pin Nail Net Name
1 2 +3V
2 153 S_DVI_HPD
3 1006 SW_DVI_HPD

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2179 QGQX12_1_2 3000.0pF 200.00pF 2 C 2 153 0 Ignore 140.00pF 224.24pF 0.4242 47.146 28.096 260.00 140.00  
2180 QGQX12_2_3_1 5.000V 0.700V 4 Q 153 1006 2 0.910V Ignore 0.290V 0.0039 18.069 16.892 0.9100 0.4900  
2181 QGQX12_3_1(N) 0.700V 0.700V 1 Q 153 1006 0 0.910V 0.490V 0.750V 0.0002 302.24 223.47 0.9100 0.4900  
2182 QGQX12_3_1(N) 3000.0pF 150.00pF 2 C 2 1006 0 Ignore 105.00pF 0.75pF 0.0002 302.24 223.47 0.9100 0.4900  

QGQX13
Device Loc Side Total Pin Tested Coverage (%) Comment
QGQX13 E1 T 3 3 100.0  

Pin Nail Net Name
1 2 +3V
2 1 GND
3 998 N17605037

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2183 QGQX13_1_2 3000.0pF 3000.0pF 2 C 2 1 0 Ignore 2100.0pF 20740.8pF 2.2265 134.74 2521.3 3900.0 2100.0  
2184 QGQX13_2_3_1 5.000V 0.700V 4 Q 1 998 2 0.910V Ignore 0.610V 0.0058 12.163 6.8970 0.9100 0.4900  
2185 QGQX13_3_1(N) 0.700V 0.700V 0 Q 2 998 0 0.910V 0.490V 0.660V 0.0007 97.875 78.930 0.9100 0.4900  
2186 QGQX13_3_1(N) 3000.0pF 300.00pF 2 C 2 998 0 Ignore 210.00pF 0.66pF 0.0007 97.875 78.930 0.9100 0.4900  

QO1Q171
Device Loc Side Total Pin Tested Coverage (%) Comment
QO1Q171 C1 T 3 3 100.0  

Pin Nail Net Name
1 3 +5V
2 659 O_COM1_RI1__Q
3 565 LAN_SIO_WAKE_

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2193 QO1Q171_1_2 3000.0pF 400.00pF 2 C 3 659 0 Ignore 280.00pF 883.28pF 0.0638 626.50 1896.6 520.00 280.00  
2194 QO1Q171_2_3_1 5.000V 0.700V 4 Q 659 565 3 0.910V Ignore 0.410V 0.0009 76.288 28.517 0.9100 0.4900  
2195 QO1Q171_3_1(N 0.700V 0.700V 0 Q 659 565 0 0.910V 0.490V 0.630V 0.0003 215.54 142.62 0.9100 0.4900  
2196 QO1Q171_3_1(N 3000.0pF 300.00pF 2 C 3 565 0 Ignore 210.00pF 0.63pF 0.0003 215.54 142.62 0.9100 0.4900  

QOQ202
Device Loc Side Total Pin Tested Coverage (%) Comment
QOQ202 A4 T 3 3 100.0  

Pin Nail Net Name
1 336 S_SPKR_R
2 1 GND
3 332 SPKO-_R

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2197 QOQ202_1_2 0.700V 0.700V 0 Q 336 1 0 0.910V 0.490V 0.790V 0.0002 330.82 196.41 0.9100 0.4900  
2198 QOQ202_2_3 1.500V 0.300V 4 Q 332 1 336 0.390V Ignore 0.050V 0.0007 46.034 82.068 0.3900 0.2100  
2199 QOQ202_3_1 0.700V 0.700V 0 Q 336 332 0 0.910V 0.490V 0.780V 0.0001 580.77 359.21 0.9100 0.4900  

QOQ203
Device Loc Side Total Pin Tested Coverage (%) Comment
QOQ203 A4 T 3 3 100.0  

Pin Nail Net Name
1 337 O_PLED_R
2 1 GND
3 344 PLED-

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2200 QOQ203_1_2 0.700V 0.700V 0 Q 337 1 0 0.910V 0.490V 0.790V 0.0002 449.03 266.33 0.9100 0.4900  
2201 QOQ203_2_3 1.500V 0.300V 4 Q 344 1 337 0.390V Ignore 0.050V 0.0005 58.089 103.36 0.3900 0.2100  
2202 QOQ203_3_1 0.700V 0.700V 0 Q 337 344 0 0.910V 0.490V 0.780V 0.0001 608.28 375.13 0.9100 0.4900  

QOQ300
Device Loc Side Total Pin Tested Coverage (%) Comment
QOQ300 F1 T 3 3 100.0  

Pin Nail Net Name
1 1338 O_CPUFAN_PWM_B
2 577 O_CPUFAN_PWM
3 1305 O_CPUFAN_PWM_Q

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2203 QOQ300_1_2 0.700V 0.700V 0 Q 1338 577 0 0.910V 0.490V 0.790V 0.0003 276.15 161.68 0.9100 0.4900  
2204 QOQ300_2_3 1.500V 0.300V 4 Q 1305 577 1338 0.390V Ignore 0.070V 0.0011 27.144 42.196 0.3900 0.2100  
2205 QOQ300_3_1 0.700V 0.700V 0 Q 1338 1305 0 0.910V 0.490V 0.780V 0.0002 286.66 180.60 0.9100 0.4900  

QOQ310
Device Loc Side Total Pin Tested Coverage (%) Comment
QOQ310 C2 T 3 3 100.0  

Pin Nail Net Name
1 674 O_CHAFAN_PWM_B
2 562 O_CHAFAN_PWM
3 668 O_CHAFAN_PWM_Q

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2206 QOQ310_1_2 0.700V 0.700V 0 Q 674 562 0 0.910V 0.490V 0.780V 0.0002 379.52 228.76 0.9100 0.4900  
2207 QOQ310_2_3 1.500V 0.300V 4 Q 668 562 674 0.390V Ignore 0.060V 0.0011 26.280 44.606 0.3900 0.2100  
2208 QOQ310_3_1 0.700V 0.700V 0 Q 674 668 0 0.910V 0.490V 0.780V 0.0002 309.51 197.33 0.9100 0.4900  

QOQ760
Device Loc Side Total Pin Tested Coverage (%) Comment
QOQ760 B2 T 3 3 100.0  

Pin Nail Net Name
1 534 O_DEEP_S5_C
2 549 +3VSB
3 399 +3VSB_ATX

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2209 QOQ760_1_2 3000.0pF 3000.0pF 2 C 534 549 0 Ignore 2100.0pF 20699.8pF 9.4495 31.748 592.61 3900.0 2100.0  
2210 QOQ760_2_3_1 5.000V 0.300V 3 Q 549 399 534 0.390V Ignore 0.030V 0.0010 29.483 60.359 0.3900 0.2100  
2211 QOQ760_3_1(P) 0.700V 0.700V 1 Q 549 399 0 0.910V 0.490V 0.680V 0.0004 174.40 154.58 0.9100 0.4900  
2212 QOQ760_3_1(P) 3000.0pF 3000.0pF 2 C 534 399 0 Ignore 2100.0pF 0.7pF 0.0004 174.40 154.58 0.9100 0.4900  

QOQ761
Device Loc Side Total Pin Tested Coverage (%) Comment
QOQ761 B2 T 3 3 100.0  

Pin Nail Net Name
1 1 GND
2 5 -12V
3 533 O_DEEP_S5_12V

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2213 QOQ761_1_2 3000.0pF 3000.0pF 2 C 1 5 0 Ignore 2100.0pF 20747.2pF 1.9043 157.54 2949.0 3900.0 2100.0  
2214 QOQ761_2_3_1 5.000V 0.700V 4 Q 5 533 1 0.910V Ignore 0.470V 0.0190 3.6880 0.2780 0.9100 0.4900  
2215 QOQ761_3_1(N) 0.700V 0.700V 0 Q 1 533 0 0.910V 0.490V 0.660V 0.0001 647.03 528.31 0.9100 0.4900  
2216 QOQ761_3_1(N) 3000.0pF 1500.0pF 2 C 1 533 0 Ignore 1050.0pF 0.7pF 0.0001 647.03 528.31 0.9100 0.4900  

QPQ111
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ111 F2 T 5 5 100.0  

Pin Nail Net Name
1 1331 P_VCORE_PHASE1_20
2 1331 P_VCORE_PHASE1_20
3 1331 P_VCORE_PHASE1_20
4 1328 P_VCORE_R_HG1_20
5 1325 P_VCORE_L+12V_S

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2217 QPQ111_3_4 3000.0pF 2000.0pF 2 C 1328 1331 0 Ignore 1400.0pF 2120.1pF 2.8876 69.262 55.403 2600.0 1400.0  
2218 QPQ111_4_5_1 5.000V 0.300V 4 Q 1331 1325 1328 0.390V Ignore 0.020V 0.0006 54.341 113.39 0.3900 0.2100  
2219 QPQ111_5_1(N) 0.700V 0.700V 1 Q 1325 1328 0 0.910V 0.490V 0.550V 0.0003 262.56 80.515 0.9100 0.4900  
2220 QPQ111_5_1(N) 3000.0pF 2000.0pF 2 C 1328 1325 0 Ignore 1400.0pF 0.6pF 0.0003 262.56 80.515 0.9100 0.4900  

QPQ114
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ114 F2 T 5 5 100.0  

Pin Nail Net Name
1 1 GND
2 1 GND
3 1 GND
4 1329 P_VCORE_LG1_20
5 1331 P_VCORE_PHASE1_20

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2231 QPQ114_3_4 3000.0pF 3000.0pF 2 C 1329 1 0 Ignore 2100.0pF 2661.9pF 7.1232 42.116 26.296 3900.0 2100.0  
2232 QPQ114_4_5_1 5.000V 0.300V 4 Q 1 1331 1329 0.390V Ignore 0.020V 0.0007 42.802 90.920 0.3900 0.2100  
2233 QPQ114_5_1(N) 0.700V 0.700V 1 Q 1331 1329 0 0.910V 0.490V 0.620V 0.0025 27.475 17.253 0.9100 0.4900  
2234 QPQ114_5_1(N) 3000.0pF 3000.0pF 2 C 1329 1331 0 Ignore 2100.0pF 0.6pF 0.0025 27.475 17.253 0.9100 0.4900  

QPQ122
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ122 E2 T 5 5 100.0  

Pin Nail Net Name
1 1 GND
2 1 GND
3 1 GND
4 1025 P_VCORE_LG2_20
5 1024 P_VCORE_PHASE2_20

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2240 QPQ122_3_4 3000.0pF 3000.0pF 2 C 1025 1 0 Ignore 2100.0pF 2540.2pF 2.1225 141.34 69.138 3900.0 2100.0  
2241 QPQ122_4_5_1 5.000V 0.300V 4 Q 1 1024 1025 0.390V Ignore 0.010V 0.0003 90.583 197.38 0.3900 0.2100  
2242 QPQ122_5_1(N) 0.700V 0.700V 1 Q 1024 1025 0 0.910V 0.490V 0.640V 0.0045 15.593 11.421 0.9100 0.4900  
2243 QPQ122_5_1(N) 3000.0pF 3000.0pF 2 C 1025 1024 0 Ignore 2100.0pF 0.6pF 0.0045 15.593 11.421 0.9100 0.4900  

QPQ123
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ123 E1 T 5 5 100.0  

Pin Nail Net Name
1 1024 P_VCORE_PHASE2_20
2 1024 P_VCORE_PHASE2_20
3 1024 P_VCORE_PHASE2_20
4 1017 P_VCORE_R_HG2_20
5 1325 P_VCORE_L+12V_S

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2244 QPQ123_3_4 3000.0pF 3000.0pF 2 C 1017 1024 0 Ignore 2100.0pF 2163.4pF 2.7022 111.02 7.8200 3900.0 2100.0  
2245 QPQ123_4_5_1 5.000V 0.300V 4 Q 1024 1325 1017 0.390V Ignore 0.020V 0.0003 116.73 244.93 0.3900 0.2100  
2246 QPQ123_5_1(N) 0.700V 0.700V 1 Q 1325 1017 0 0.910V 0.490V 0.640V 0.0049 14.273 10.048 0.9100 0.4900  
2247 QPQ123_5_1(N) 3000.0pF 3000.0pF 2 C 1017 1325 0 Ignore 2100.0pF 0.6pF 0.0049 14.273 10.048 0.9100 0.4900  

QPQ133
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ133 E1 T 5 5 100.0  

Pin Nail Net Name
1 1023 P_VCORE_PHASE3_20
2 1023 P_VCORE_PHASE3_20
3 1023 P_VCORE_PHASE3_20
4 1020 P_VCORE_R_HG3_20
5 1325 P_VCORE_L+12V_S

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2263 QPQ133_3_4 3000.0pF 3000.0pF 2 C 1020 1023 0 Ignore 2100.0pF 2132.1pF 2.1195 141.54 5.0550 3900.0 2100.0  
2264 QPQ133_4_5_1 5.000V 0.300V 4 Q 1023 1325 1020 0.390V Ignore 0.020V 0.0001 221.74 471.98 0.3900 0.2100  
2265 QPQ133_5_1(N) 0.700V 0.700V 1 Q 1325 1020 0 0.910V 0.490V 0.620V 0.0041 17.263 10.969 0.9100 0.4900  
2266 QPQ133_5_1(N) 3000.0pF 3000.0pF 2 C 1020 1325 0 Ignore 2100.0pF 0.6pF 0.0041 17.263 10.969 0.9100 0.4900  

QPQ134
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ134 E2 T 5 5 100.0  

Pin Nail Net Name
1 1 GND
2 1 GND
3 1 GND
4 1026 P_VCORE_LG3_20
5 1023 P_VCORE_PHASE3_20

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2267 QPQ134_3_4 3000.0pF 3000.0pF 2 C 1 1026 0 Ignore 2100.0pF 2343.0pF 1.2549 239.06 64.552 3900.0 2100.0  
2268 QPQ134_4_5_1 5.000V 0.300V 4 Q 1 1023 1026 0.390V Ignore 0.010V 0.0009 34.792 75.754 0.3900 0.2100  
2269 QPQ134_5_1(N) 0.700V 0.700V 1 Q 1023 1026 0 0.910V 0.490V 0.790V 0.0002 345.74 200.74 0.9100 0.4900  
2270 QPQ134_5_1(N) 3000.0pF 3000.0pF 2 C 1026 1023 0 Ignore 2100.0pF 0.8pF 0.0002 345.74 200.74 0.9100 0.4900  

QPQ142
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ142 D2 T 5 5 100.0  

Pin Nail Net Name
1 1 GND
2 1 GND
3 1 GND
4 961 P_VCORE_LG4_20
5 949 P_VCORE_PHASE4_20

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2276 QPQ142_3_4 3000.0pF 3000.0pF 2 C 961 1 0 Ignore 2100.0pF 2670.7pF 5.4121 55.432 35.151 3900.0 2100.0  
2277 QPQ142_4_5_1 5.000V 0.300V 4 Q 1 949 961 0.390V Ignore 0.020V 0.0006 50.184 106.61 0.3900 0.2100  
2278 QPQ142_5_1(N) 0.700V 0.700V 1 Q 949 961 0 0.910V 0.490V 0.790V 0.0002 315.14 173.36 0.9100 0.4900  
2279 QPQ142_5_1(N) 3000.0pF 3000.0pF 2 C 961 949 0 Ignore 2100.0pF 0.8pF 0.0002 315.14 173.36 0.9100 0.4900  

QPQ143
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ143 D1 T 5 5 100.0  

Pin Nail Net Name
1 949 P_VCORE_PHASE4_20
2 949 P_VCORE_PHASE4_20
3 949 P_VCORE_PHASE4_20
4 960 P_VCORE_R_HG4_20
5 1325 P_VCORE_L+12V_S

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2280 QPQ143_3_4 3000.0pF 3000.0pF 2 C 960 949 0 Ignore 2100.0pF 2253.9pF 6.4923 46.209 7.9020 3900.0 2100.0  
2281 QPQ143_4_5_1 5.000V 0.300V 4 Q 949 1325 960 0.390V Ignore 0.020V 0.0011 28.302 59.304 0.3900 0.2100  
2282 QPQ143_5_1(N) 0.700V 0.700V 1 Q 1325 960 0 0.910V 0.490V 0.640V 0.0030 23.070 16.487 0.9100 0.4900  
2283 QPQ143_5_1(N) 3000.0pF 3000.0pF 2 C 960 1325 0 Ignore 2100.0pF 0.6pF 0.0030 23.070 16.487 0.9100 0.4900  

QPQ211
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ211 F3 T 5 5 100.0  

Pin Nail Net Name
1 1308 P_GT_PHASE1_20
2 1308 P_GT_PHASE1_20
3 1308 P_GT_PHASE1_20
4 1296 P_GT_R_HG1_R_20
5 1325 P_VCORE_L+12V_S

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2289 QPQ211_3_4 3000.0pF 3000.0pF 2 C 1296 1308 0 Ignore 2100.0pF 2200.3pF 1.1633 257.88 28.736 3900.0 2100.0  
2290 QPQ211_4_5_1 5.000V 0.300V 4 Q 1308 1325 1296 0.390V Ignore 0.020V 0.0009 33.587 70.924 0.3900 0.2100  
2291 QPQ211_5_1(N) 0.700V 0.700V 1 Q 1325 1296 0 0.910V 0.490V 0.610V 0.0043 16.378 9.0580 0.9100 0.4900  
2292 QPQ211_5_1(N) 3000.0pF 3000.0pF 2 C 1296 1325 0 Ignore 2100.0pF 0.6pF 0.0043 16.378 9.0580 0.9100 0.4900  

QPQ212
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ212 F2 T 5 5 100.0  

Pin Nail Net Name
1 1 GND
2 1 GND
3 1 GND
4 1307 P_GT_LG1_20
5 1308 P_GT_PHASE1_20

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2293 QPQ212_3_4 3000.0pF 2000.0pF 2 C 1307 1 0 Ignore 1400.0pF 2052.2pF 4.1681 47.983 43.812 2600.0 1400.0  
2294 QPQ212_4_5_1 5.000V 0.300V 4 Q 1 1308 1307 0.390V Ignore 0.020V 0.0013 22.256 47.793 0.3900 0.2100  
2295 QPQ212_5_1(N) 0.700V 0.700V 1 Q 1308 1307 0 0.910V 0.490V 0.640V 0.0046 15.337 10.739 0.9100 0.4900  
2296 QPQ212_5_1(N) 3000.0pF 2000.0pF 2 C 1307 1308 0 Ignore 1400.0pF 0.6pF 0.0046 15.337 10.739 0.9100 0.4900  

QPQ221
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ221 F2 T 5 5 100.0  

Pin Nail Net Name
1 1323 P_GT_PHASE2_20
2 1323 P_GT_PHASE2_20
3 1323 P_GT_PHASE2_20
4 1316 P_GT_R_HG2_R_20
5 1325 P_VCORE_L+12V_S

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2302 QPQ221_3_4 3000.0pF 2000.0pF 2 C 1316 1323 0 Ignore 1400.0pF 2105.2pF 4.6874 42.667 35.185 2600.0 1400.0  
2303 QPQ221_4_5_1 5.000V 0.300V 4 Q 1323 1325 1316 0.390V Ignore 0.020V 0.0008 36.653 77.013 0.3900 0.2100  
2304 QPQ221_5_1(N) 0.700V 0.700V 1 Q 1325 1316 0 0.910V 0.490V 0.570V 0.0038 18.375 6.8070 0.9100 0.4900  
2305 QPQ221_5_1(N) 3000.0pF 2000.0pF 2 C 1316 1325 0 Ignore 1400.0pF 0.6pF 0.0038 18.375 6.8070 0.9100 0.4900  

QPQ222
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ222 F2 T 5 5 100.0  

Pin Nail Net Name
1 1 GND
2 1 GND
3 1 GND
4 1318 P_GT_LG2_20
5 1323 P_GT_PHASE2_20

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2306 QPQ222_3_4 3000.0pF 2000.0pF 2 C 1318 1 0 Ignore 1400.0pF 1991.4pF 4.6110 43.374 42.751 2600.0 1400.0  
2307 QPQ222_4_5_1 5.000V 0.300V 4 Q 1 1323 1318 0.390V Ignore 0.020V 0.0010 31.436 67.410 0.3900 0.2100  
2308 QPQ222_5_1(N) 0.700V 0.700V 1 Q 1323 1318 0 0.910V 0.490V 0.780V 0.0005 152.60 96.076 0.9100 0.4900  
2309 QPQ222_5_1(N) 3000.0pF 2000.0pF 2 C 1318 1323 0 Ignore 1400.0pF 0.8pF 0.0005 152.60 96.076 0.9100 0.4900  

QPQ304
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ304 F4 T 3 3 100.0  

Pin Nail Net Name
1 1223 P_VCCIO_PG_G2_10
2 1 GND
3 1225 P_+VCCIO_PG_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2328 QPQ304_1_2 3000.0pF 200.00pF 2 C 1223 1 0 Ignore 140.00pF 940.72pF 1.2578 15.901 180.40 260.00 140.00  
2329 QPQ304_2_3_1 5.000V 0.700V 4 Q 1 1225 1223 0.910V Ignore 0.030V 0.0009 77.370 168.77 0.9100 0.4900  
2330 QPQ304_3_1(N) 0.700V 0.700V 1 Q 1 1225 0 0.910V 0.490V 0.680V 0.0005 138.43 122.41 0.9100 0.4900  
2331 QPQ304_3_1(N) 3000.0pF 200.00pF 2 C 1223 1225 0 Ignore 140.00pF 0.68pF 0.0005 138.43 122.41 0.9100 0.4900  

QPQ306
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ306 F4 T 3 3 100.0  

Pin Nail Net Name
1 1224 P_VCCIO_PG_G1_10
2 1 GND
3 1223 P_VCCIO_PG_G2_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2335 QPQ306_1_2 0.700V 0.700V 0 Q 1224 1 0 0.910V 0.490V 0.780V 0.0001 769.32 463.13 0.9100 0.4900  
2336 QPQ306_2_3 1.500V 0.300V 4 Q 1223 1 1224 0.390V Ignore 0.050V 0.0010 30.720 54.665 0.3900 0.2100  
2337 QPQ306_3_1 0.700V 0.700V 0 Q 1224 1223 0 0.910V 0.490V 0.780V 0.0002 375.86 235.07 0.9100 0.4900  

QPQ403
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ403 A2 T 3 3 100.0  

Pin Nail Net Name
1 98 P_3V_GATE_10
2 2 +3V
3 793 +3V_ATX

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2341 QPQ403_1_2 3000.0pF 3000.0pF 2 C 98 2 0 Ignore 2100.0pF 20742.6pF 249.26 1.2040 22.524 3900.0 2100.0  
2342 QPQ403_2_3_1 5.000V 0.700V 3 Q 2 793 98 0.910V Ignore 0.020V 0.0008 89.520 200.29 0.9100 0.4900  
2343 QPQ403_3_1(P) 0.700V 0.700V 1 Q 2 793 0 0.910V 0.490V 0.640V 0.0002 359.01 252.34 0.9100 0.4900  
2344 QPQ403_3_1(P) 3000.0pF 3000.0pF 2 C 98 793 0 Ignore 2100.0pF 0.6pF 0.0002 359.01 252.34 0.9100 0.4900  

QPQ404
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ404 A2 T 3 3 100.0  

Pin Nail Net Name
1 99 P_+3V_OV_G1_10
2 793 +3V_ATX
3 98 P_3V_GATE_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2345 QPQ404_1_2 0.700V 0.700V 0 Q 793 99 0 0.910V 0.490V 0.790V 0.0002 363.61 210.50 0.9100 0.4900  
2346 QPQ404_2_3 1.500V 0.300V 3 Q 98 793 99 0.390V Ignore 0.050V 0.0013 23.817 41.523 0.3900 0.2100  
2347 QPQ404_3_1 0.700V 0.700V 0 Q 98 99 0 0.910V 0.490V 0.780V 0.0002 323.33 198.43 0.9100 0.4900  

QPQ410
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ410 B2 T 3 3 100.0  

Pin Nail Net Name
1 101 P_+3V_OV_REF_10
2 528 P_+3V_OV_E_10
3 100 P_+3V_OV_G_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2348 QPQ410_1_2 0.700V 0.700V 0 Q 101 528 0 0.910V 0.490V 0.780V 0.0002 282.54 175.04 0.9100 0.4900  
2349 QPQ410_2_3 1.500V 0.300V 4 Q 100 528 101 0.390V Ignore 0.050V 0.0003 94.691 166.41 0.3900 0.2100  
2350 QPQ410_3_1 0.700V 0.700V 0 Q 101 100 0 0.910V 0.490V 0.770V 0.0001 515.72 335.38 0.9100 0.4900  

QPQ506
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ506 F4 T 3 3 100.0  

Pin Nail Net Name
1 1162 P_SLP_S4__R1_10
2 1 GND
3 1163 P_+VDDQ_C1_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2354 QPQ506_1_2 0.700V 0.700V 0 Q 1162 1 0 0.910V 0.490V 0.780V 0.0001 578.53 345.87 0.9100 0.4900  
2355 QPQ506_2_3 1.500V 0.300V 4 Q 1163 1 1162 0.390V Ignore 0.050V 0.0005 56.640 101.32 0.3900 0.2100  
2356 QPQ506_3_1 0.700V 0.700V 0 Q 1162 1163 0 0.910V 0.490V 0.780V 0.0001 579.27 360.55 0.9100 0.4900  

QPQ511
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ511 E4 T 5 5 100.0  

Pin Nail Net Name
1 1147 P_VDDQ_PHASE_20
2 1147 P_VDDQ_PHASE_20
3 1147 P_VDDQ_PHASE_20
4 1149 P_VDDQ_UGATE_M_20
5 1150 P_VDDQ_REGIN_S

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2357 QPQ511_3_4 3000.0pF 3000.0pF 2 C 1149 1147 0 Ignore 2100.0pF 2254.5pF 2.6144 114.75 19.695 3900.0 2100.0  
2358 QPQ511_4_5_1 5.000V 0.300V 4 Q 1147 1150 1149 0.390V Ignore 0.050V 0.0015 20.332 36.087 0.3900 0.2100  
2359 QPQ511_5_1(N) 0.700V 0.700V 1 Q 1150 1149 0 0.910V 0.490V 0.510V 0.0026 26.925 2.9970 0.9100 0.4900  
2360 QPQ511_5_1(N) 3000.0pF 3000.0pF 2 C 1149 1150 0 Ignore 2100.0pF 0.5pF 0.0026 26.925 2.9970 0.9100 0.4900  

QPQ512
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ512 E4 T 5 5 100.0  

Pin Nail Net Name
1 1 GND
2 1 GND
3 1 GND
4 1146 P_VDDQ_LGATE_20
5 1147 P_VDDQ_PHASE_20

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2361 QPQ512_3_4 3000.0pF 2000.0pF 2 C 1146 1 0 Ignore 1400.0pF 2072.4pF 4.8964 40.846 35.916 2600.0 1400.0  
2362 QPQ512_4_5_1 5.000V 0.300V 4 Q 1 1147 1146 0.390V Ignore 0.030V 0.0020 14.817 30.135 0.3900 0.2100  
2363 QPQ512_5_1(N) 0.700V 0.700V 1 Q 1147 1146 0 0.910V 0.490V 0.520V 0.0035 19.829 2.8150 0.9100 0.4900  
2364 QPQ512_5_1(N) 3000.0pF 2000.0pF 2 C 1146 1147 0 Ignore 1400.0pF 0.5pF 0.0035 19.829 2.8150 0.9100 0.4900  

QPQ515
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ515 F4 T 3 3 100.0  

Pin Nail Net Name
1 1170 P_+VDDQ_PG_B1_10
2 1 GND
3 1171 P_+VDDQ_PG_B2_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2365 QPQ515_1_2 0.700V 0.700V 0 Q 1170 1 0 0.910V 0.490V 0.780V 0.0001 1125.3 671.87 0.9100 0.4900  
2366 QPQ515_2_3 1.500V 0.300V 4 Q 1171 1 1170 0.390V Ignore 0.050V 0.0014 21.038 37.605 0.3900 0.2100  
2367 QPQ515_3_1 0.700V 0.700V 0 Q 1170 1171 0 0.910V 0.490V 0.780V 0.0002 338.24 210.15 0.9100 0.4900  

QPQ516
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ516 F4 T 3 3 100.0  

Pin Nail Net Name
1 1171 P_+VDDQ_PG_B2_10
2 1 GND
3 1222 P_+VDDQ_PG_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2368 QPQ516_1_2 3000.0pF 300.00pF 2 C 1171 1 0 Ignore 210.00pF 916.10pF 3.0661 9.7840 57.196 390.00 210.00  
2369 QPQ516_2_3_1 5.000V 0.300V 4 Q 1 1222 1171 0.390V Ignore 0.030V 0.0008 37.201 73.125 0.3900 0.2100  
2370 QPQ516_3_1(N) 0.700V 0.700V 1 Q 1 1222 0 0.910V 0.490V 0.660V 0.0003 232.29 192.71 0.9100 0.4900  
2371 QPQ516_3_1(N) 3000.0pF 30.00pF 2 C 1171 1222 0 Ignore 21.00pF 0.66pF 0.0003 232.29 192.71 0.9100 0.4900  

QPQ520
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ520 C3 T 3 3 100.0  

Pin Nail Net Name
1 706 P_DDR_VTT_C_10
2 1 GND
3 702 P_VTT_DDR_EN_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2372 QPQ520_1_2 3000.0pF 300.00pF 2 C 706 1 0 Ignore 210.00pF 908.23pF 1.5259 19.661 113.21 390.00 210.00  
2373 QPQ520_2_3_1 5.000V 0.700V 4 Q 1 702 706 0.910V Ignore 0.030V 0.0009 76.702 167.03 0.9100 0.4900  
2374 QPQ520_3_1(N) 0.700V 0.700V 1 Q 1 702 0 0.910V 0.490V 0.710V 0.0002 296.41 280.38 0.9100 0.4900  
2375 QPQ520_3_1(N) 3000.0pF 30.00pF 2 C 706 702 0 Ignore 21.00pF 0.71pF 0.0002 296.41 280.38 0.9100 0.4900  

QPQ521
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ521 C3 T 3 3 100.0  

Pin Nail Net Name
1 707 DDR_VTT_CNTL_B_10
2 1 GND
3 706 P_DDR_VTT_C_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2376 QPQ521_1_2 0.700V 0.700V 0 Q 707 1 0 0.910V 0.490V 0.790V 0.0004 172.84 101.88 0.9100 0.4900  
2377 QPQ521_2_3 1.500V 0.300V 4 Q 706 1 707 0.390V Ignore 0.050V 0.0009 33.862 60.183 0.3900 0.2100  
2378 QPQ521_3_1 0.700V 0.700V 0 Q 707 706 0 0.910V 0.490V 0.780V 0.0004 171.02 104.94 0.9100 0.4900  

QPQ522
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ522 F4 T 3 3 100.0  

Pin Nail Net Name
1 1164 P_VDDQ_COMP_GATE_10
2 1 GND
3 1166 P_VDDQ_COMP_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2379 QPQ522_1_2 3000.0pF 300.00pF 2 C 1164 1 0 Ignore 210.00pF 791.95pF 5.0317 5.9620 26.628 390.00 210.00  
2380 QPQ522_2_3_1 5.000V 0.700V 4 Q 1 1166 1164 0.910V Ignore 0.030V 0.0010 70.587 154.38 0.9100 0.4900  
2381 QPQ522_3_1(N) 0.700V 0.700V 1 Q 1 1166 0 0.910V 0.490V 0.710V 0.0006 112.23 108.43 0.9100 0.4900  
2382 QPQ522_3_1(N) 3000.0pF 30.00pF 2 C 1164 1166 0 Ignore 21.00pF 0.71pF 0.0006 112.23 108.43 0.9100 0.4900  

QPQ523
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ523 F4 T 3 3 100.0  

Pin Nail Net Name
1 1172 P_+5V_R1_10
2 1163 P_+VDDQ_C1_10
3 1164 P_VDDQ_COMP_GATE_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2383 QPQ523_1_2 0.700V 0.700V 0 Q 1172 1163 0 0.910V 0.490V 0.790V 0.0002 350.43 207.33 0.9100 0.4900  
2384 QPQ523_2_3 1.500V 0.300V 4 Q 1164 1163 1172 0.390V Ignore 0.050V 0.0009 35.208 61.607 0.3900 0.2100  
2385 QPQ523_3_1 0.700V 0.700V 0 Q 1172 1164 0 0.910V 0.490V 0.780V 0.0001 474.63 294.51 0.9100 0.4900  

QPQ532
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ532 F4 T 3 3 100.0  

Pin Nail Net Name
1 129 S_SLP_S4_
2 1 GND
3 1161 P_+VDDQ_G_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2386 QPQ532_1_2 3000.0pF 500.00pF 2 C 129 1 0 Ignore 350.00pF 999.58pF 2.1391 23.374 54.474 650.00 350.00  
2387 QPQ532_2_3_1 5.000V 0.700V 4 Q 1 1161 129 0.910V Ignore 0.290V 0.0011 63.651 60.734 0.9100 0.4900  
2388 QPQ532_3_1(N) 0.700V 0.700V 0 Q 1 1161 0 0.910V 0.490V 0.620V 0.0002 349.65 211.72 0.9100 0.4900  
2389 QPQ532_3_1(N) 3000.0pF 50.00pF 2 C 129 1161 0 Ignore 35.00pF 0.62pF 0.0002 349.65 211.72 0.9100 0.4900  

QPQ533
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ533 F4 T 3 3 100.0  

Pin Nail Net Name
1 1161 P_+VDDQ_G_10
2 1 GND
3 1165 P_+VDDQ_S

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2390 QPQ533_1_2 3000.0pF 2000.0pF 2 C 1161 1 0 Ignore 1400.0pF 2040.1pF 4.3842 45.618 42.573 2600.0 1400.0  
2391 QPQ533_2_3_1 5.000V 0.700V 4 Q 1 1165 1161 0.910V Ignore 0.010V 0.0009 81.240 184.58 0.9100 0.4900  
2392 QPQ533_3_1(N) 0.600V 0.600V 1 Q 1 1165 0 0.780V 0.420V 0.480V 0.0012 50.442 18.162 0.7800 0.4200  
2393 QPQ533_3_1(N) 3000.0pF 1300.0pF 2 C 1161 1165 0 Ignore 910.0pF 0.5pF 0.0012 50.442 18.162 0.7800 0.4200  

QPQ601
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ601 B4 T 3 3 100.0  

Pin Nail Net Name
1 368 P_+5VSB_ATX_OV_B_10
2 797 +5VSB_ATX
3 367 P_5VSB_GATE_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2394 QPQ601_1_2 0.700V 0.700V 0 Q 797 368 0 0.910V 0.490V 0.790V 0.0001 908.86 515.18 0.9100 0.4900  
2395 QPQ601_2_3 1.500V 0.300V 3 Q 367 797 368 0.390V Ignore 0.060V 0.0007 44.746 76.060 0.3900 0.2100  
2396 QPQ601_3_1 0.700V 0.700V 0 Q 367 368 0 0.910V 0.490V 0.780V 0.0001 1173.9 701.08 0.9100 0.4900  

QPQ602
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ602 B4 T 3 3 100.0  

Pin Nail Net Name
1 357 P_+5VSB_ATX_OV_REF_10
2 356 P_+5VSB_ATX_OV_E_10
3 358 P_+5VSB_ATX_OV_G_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2397 QPQ602_1_2 0.700V 0.700V 0 Q 357 356 0 0.910V 0.490V 0.780V 0.0001 767.54 466.48 0.9100 0.4900  
2398 QPQ602_2_3 1.500V 0.300V 4 Q 358 356 357 0.390V Ignore 0.050V 0.0010 30.107 52.017 0.3900 0.2100  
2399 QPQ602_3_1 0.700V 0.700V 0 Q 357 358 0 0.910V 0.490V 0.780V 0.0001 820.95 522.06 0.9100 0.4900  

QPQ603
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ603 C4 T 3 3 100.0  

Pin Nail Net Name
1 359 P_5VSB_Q1_10
2 405 +5VSB
3 792 P_5VSB_SHORT_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2400 QPQ603_1_2 0.700V 0.700V 0 Q 359 405 0 0.910V 0.490V 0.780V 0.0000 2105.2 1273.3 0.9100 0.4900  
2401 QPQ603_2_3 1.500V 0.300V 4 Q 792 405 359 0.390V Ignore 0.050V 0.0006 51.252 89.029 0.3900 0.2100  
2402 QPQ603_3_1 0.700V 0.700V 0 Q 359 792 0 0.910V 0.490V 0.780V 0.0001 980.33 619.99 0.9100 0.4900  

QPQ604
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ604 B4 T 3 3 100.0  

Pin Nail Net Name
1 378 P_5VSB_Q3_10
2 1 GND
3 377 P_5VSB_GATE_10_1

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2403 QPQ604_1_2 0.700V 0.700V 0 Q 378 1 0 0.910V 0.490V 0.780V 0.0001 648.74 393.80 0.9100 0.4900  
2404 QPQ604_2_3 1.500V 0.300V 4 Q 377 1 378 0.390V Ignore 0.050V 0.0005 55.652 99.179 0.3900 0.2100  
2405 QPQ604_3_1 0.700V 0.700V 0 Q 378 377 0 0.910V 0.490V 0.780V 0.0001 978.21 616.47 0.9100 0.4900  

QPQ605
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ605 B4 T 3 3 100.0  

Pin Nail Net Name
1 367 P_5VSB_GATE_10
2 405 +5VSB
3 797 +5VSB_ATX

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2406 QPQ605_1_2 3000.0pF 3000.0pF 2 C 367 405 0 Ignore 2100.0pF 20777.9pF 0.4583 654.59 12275 3900.0 2100.0  
2407 QPQ605_2_3_1 5.000V 0.300V 3 Q 405 797 367 0.390V Ignore 0.020V 0.0010 31.073 64.741 0.3900 0.2100  
2408 QPQ605_3_1(P) 0.700V 0.700V 1 Q 405 797 0 0.910V 0.490V 0.640V 0.0001 1176.3 842.98 0.9100 0.4900  
2409 QPQ605_3_1(P) 3000.0pF 3000.0pF 2 C 367 797 0 Ignore 2100.0pF 0.6pF 0.0001 1176.3 842.98 0.9100 0.4900  

QPQ606
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ606 B4 T 5 5 100.0  

Pin Nail Net Name
1 3 +5V
2 3 +5V
3 3 +5V
4 365 P_5VSB_GATE1_10
5 405 +5VSB

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2410 QPQ606_3_4 3000.0pF 2000.0pF 2 C 365 3 0 Ignore 1400.0pF 2057.9pF 7.7980 25.648 23.174 2600.0 1400.0  
2411 QPQ606_4_5_1 5.000V 0.300V 4 Q 3 405 365 0.390V Ignore 0.010V 0.0014 21.661 47.691 0.3900 0.2100  
2412 QPQ606_5_1(N) 0.700V 0.700V 1 Q 3 405 0 0.910V 0.490V 0.600V 0.0088 7.9710 4.0450 0.9100 0.4900  
2413 QPQ606_5_1(N) 3000.0pF 2000.0pF 2 C 365 405 0 Ignore 1400.0pF 0.6pF 0.0088 7.9710 4.0450 0.9100 0.4900  

QPQ607
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ607 B4 T 3 3 100.0  

Pin Nail Net Name
1 366 P_5VSB_Q2_10
2 1 GND
3 365 P_5VSB_GATE1_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2414 QPQ607_1_2 0.700V 0.700V 0 Q 366 1 0 0.910V 0.490V 0.780V 0.0001 522.42 317.08 0.9100 0.4900  
2415 QPQ607_2_3 1.500V 0.300V 4 Q 365 1 366 0.390V Ignore 0.050V 0.0009 32.782 58.488 0.3900 0.2100  
2416 QPQ607_3_1 0.700V 0.700V 0 Q 366 365 0 0.910V 0.490V 0.780V 0.0001 607.47 382.48 0.9100 0.4900  

QPQ608
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ608 F4 T 3 3 100.0  

Pin Nail Net Name
1 1152 P_5V_DUAL__
2 1 GND
3 1155 P_5V_DUAL_Q4_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2417 QPQ608_1_2 0.700V 0.700V 0 Q 1152 1 0 0.910V 0.490V 0.780V 0.0002 451.82 269.81 0.9100 0.4900  
2418 QPQ608_2_3 1.500V 0.300V 4 Q 1155 1 1152 0.390V Ignore 0.050V 0.0008 39.743 71.133 0.3900 0.2100  
2419 QPQ608_3_1 0.700V 0.700V 0 Q 1152 1155 0 0.910V 0.490V 0.780V 0.0002 410.96 255.29 0.9100 0.4900  

QPQ609
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ609 F4 T 3 3 100.0  

Pin Nail Net Name
1 1153 P_5V_DUAL_Q2_10
2 1 GND
3 1154 P_5V_DUAL_GATE_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2420 QPQ609_1_2 0.700V 0.700V 0 Q 1153 1 0 0.910V 0.490V 0.780V 0.0002 387.97 234.17 0.9100 0.4900  
2421 QPQ609_2_3 1.500V 0.300V 4 Q 1154 1 1153 0.390V Ignore 0.050V 0.0013 22.237 39.742 0.3900 0.2100  
2422 QPQ609_3_1 0.700V 0.700V 0 Q 1153 1154 0 0.910V 0.490V 0.780V 0.0002 391.44 246.01 0.9100 0.4900  

QPQ610
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ610 F4 T 5 5 100.0  

Pin Nail Net Name
1 3 +5V
2 3 +5V
3 3 +5V
4 1154 P_5V_DUAL_GATE_10
5 1178 +5VDUAL

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2423 QPQ610_3_4 3000.0pF 2000.0pF 2 C 1154 3 0 Ignore 1400.0pF 2035.8pF 6.8722 29.103 27.364 2600.0 1400.0  
2424 QPQ610_4_5_1 5.000V 0.300V 4 Q 3 1178 1154 0.390V Ignore 0.010V 0.0009 33.739 74.379 0.3900 0.2100  
2425 QPQ610_5_1(N) 0.700V 0.700V 1 Q 3 1178 0 0.910V 0.490V 0.610V 0.0126 5.5430 3.0860 0.9100 0.4900  
2426 QPQ610_5_1(N) 3000.0pF 2000.0pF 2 C 1154 1178 0 Ignore 1400.0pF 0.6pF 0.0126 5.5430 3.0860 0.9100 0.4900  

QPQ611
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ611 F4 T 3 3 100.0  

Pin Nail Net Name
1 1156 P_5V_DUAL_C3_10
2 797 +5VSB_ATX
3 1178 +5VDUAL

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2427 QPQ611_1_2 3000.0pF 1000.0pF 2 C 1156 797 0 Ignore 700.0pF 1051.4pF 6.3246 15.811 13.102 1300.0 700.00  
2428 QPQ611_2_3_1 5.000V 0.700V 3 Q 797 1178 1156 0.910V Ignore 0.030V 0.0013 54.974 121.67 0.9100 0.4900  
2429 QPQ611_3_1(P) 0.700V 0.700V 1 Q 1178 797 0 0.910V 0.490V 0.530V 0.0003 204.74 37.747 0.9100 0.4900  
2430 QPQ611_3_1(P) 3000.0pF 1000.0pF 2 C 1156 1178 0 Ignore 700.0pF 0.5pF 0.0003 204.74 37.747 0.9100 0.4900  

QPQ612
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ612 F4 T 3 3 100.0  

Pin Nail Net Name
1 1157 P_5V_DUAL_Q3_10
2 1 GND
3 1156 P_5V_DUAL_C3_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2431 QPQ612_1_2 0.700V 0.700V 0 Q 1157 1 0 0.910V 0.490V 0.780V 0.0002 347.92 209.90 0.9100 0.4900  
2432 QPQ612_2_3 1.500V 0.300V 4 Q 1156 1 1157 0.390V Ignore 0.050V 0.0004 75.649 134.98 0.3900 0.2100  
2433 QPQ612_3_1 0.700V 0.700V 0 Q 1157 1156 0 0.910V 0.490V 0.780V 0.0002 420.87 263.63 0.9100 0.4900  

QPQ613
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ613 C4 T 3 3 100.0  

Pin Nail Net Name
1 789 P_5VSB_B1_10
2 1 GND
3 359 P_5VSB_Q1_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2434 QPQ613_1_2 0.700V 0.700V 0 Q 789 1 0 0.910V 0.490V 0.780V 0.0002 394.52 236.51 0.9100 0.4900  
2435 QPQ613_2_3 1.500V 0.300V 4 Q 359 1 789 0.390V Ignore 0.050V 0.0013 23.414 41.430 0.3900 0.2100  
2436 QPQ613_3_1 0.700V 0.700V 0 Q 789 359 0 0.910V 0.490V 0.780V 0.0002 371.39 230.04 0.9100 0.4900  

QPQ620
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ620 C4 T 3 3 100.0  

Pin Nail Net Name
1 411 O_DEEP_S5
2 1 GND
3 359 P_5VSB_Q1_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2437 QPQ620_1_2 3000.0pF 1000.0pF 2 C 411 1 0 Ignore 700.0pF 1095.1pF 7.4350 13.450 9.1850 1300.0 700.00  
2438 QPQ620_2_3_1 5.000V 0.700V 4 Q 1 359 411 0.910V Ignore 0.040V 0.0010 68.789 147.68 0.9100 0.4900  
2439 QPQ620_3_1(N) 0.700V 0.700V 0 Q 1 359 0 0.910V 0.490V 0.590V 0.0006 110.32 52.947 0.9100 0.4900  
2440 QPQ620_3_1(N) 3000.0pF 1500.0pF 1 C 411 359 0 Ignore 1050.0pF 0.6pF 0.0006 110.32 52.947 0.9100 0.4900  

QPQ621
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ621 B4 T 3 3 100.0  

Pin Nail Net Name
1 379 P_5VSB_GATE_B1_10
2 370 P_5VSB_GATE_R_10
3 797 +5VSB_ATX

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2441 QPQ621_1_2 0.700V 0.700V 0 Q 379 370 0 0.910V 0.490V 0.790V 0.0001 574.99 336.39 0.9100 0.4900  
2442 QPQ621_2_3 1.500V 0.300V 4 Q 797 370 379 0.390V Ignore 0.050V 0.0003 106.12 185.61 0.3900 0.2100  
2443 QPQ621_3_1 0.700V 0.700V 0 Q 379 797 0 0.910V 0.490V 0.780V 0.0001 668.07 410.90 0.9100 0.4900  

QPQ622
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ622 B4 T 3 3 100.0  

Pin Nail Net Name
1 340 P_SLPS3__C1_10
2 1 GND
3 380 P_5VSB_GATE_RC_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2444 QPQ622_1_2 0.700V 0.700V 0 Q 340 1 0 0.910V 0.490V 0.780V 0.0001 672.30 406.35 0.9100 0.4900  
2445 QPQ622_2_3 1.500V 0.300V 4 Q 380 1 340 0.390V Ignore 0.050V 0.0007 40.678 72.741 0.3900 0.2100  
2446 QPQ622_3_1 0.700V 0.700V 0 Q 340 380 0 0.910V 0.490V 0.780V 0.0002 452.73 283.46 0.9100 0.4900  

QPQ624
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ624 A4 T 3 3 100.0  

Pin Nail Net Name
1 341 P_SLPS3__R_10
2 1 GND
3 340 P_SLPS3__C1_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2447 QPQ624_1_2 0.700V 0.700V 0 Q 341 1 0 0.910V 0.490V 0.790V 0.0001 684.72 406.04 0.9100 0.4900  
2448 QPQ624_2_3 1.500V 0.300V 4 Q 340 1 341 0.390V Ignore 0.050V 0.0006 47.327 84.721 0.3900 0.2100  
2449 QPQ624_3_1 0.700V 0.700V 0 Q 341 340 0 0.910V 0.490V 0.780V 0.0001 805.17 497.31 0.9100 0.4900  

QPQ625
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ625 A4 T 3 3 100.0  

Pin Nail Net Name
1 271 S_PWROK
2 1 GND
3 341 P_SLPS3__R_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2450 QPQ625_1_2 3000.0pF 3000.0pF 2 C 271 1 0 Ignore 2100.0pF 2699.8pF 5.3335 56.248 37.489 3900.0 2100.0  
2451 QPQ625_2_3_1 5.000V 0.700V 4 Q 1 341 271 0.910V Ignore 0.100V 0.0012 58.166 107.87 0.9100 0.4900  
2452 QPQ625_3_1(N) 0.700V 0.700V 0 Q 1 341 0 0.910V 0.490V 0.590V 0.0005 140.48 68.686 0.9100 0.4900  
2453 QPQ625_3_1(N) 3000.0pF 30.00pF 2 C 271 341 0 Ignore 21.00pF 0.59pF 0.0005 140.48 68.686 0.9100 0.4900  

QPQ705
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ705 B3 T 3 3 100.0  

Pin Nail Net Name
1 422 P_VCCST_VCCSFR_B_10
2 1 GND
3 423 P_VCCST_VCCSFR_C_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2454 QPQ705_1_2 0.700V 0.700V 0 Q 422 1 0 0.910V 0.490V 0.780V 0.0001 986.18 589.59 0.9100 0.4900  
2455 QPQ705_2_3 1.500V 0.300V 4 Q 423 1 422 0.390V Ignore 0.050V 0.0005 65.680 117.62 0.3900 0.2100  
2456 QPQ705_3_1 0.700V 0.700V 0 Q 422 423 0 0.910V 0.490V 0.780V 0.0002 462.56 287.94 0.9100 0.4900  

QPQ706
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ706 B3 T 3 3 100.0  

Pin Nail Net Name
1 423 P_VCCST_VCCSFR_C_10
2 1 GND
3 413 P_VCCST_VCCSFR_D1_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2457 QPQ706_1_2 3000.0pF 200.00pF 2 C 423 1 0 Ignore 140.00pF 688.73pF 9.2718 2.1570 15.413 260.00 140.00  
2458 QPQ706_2_3_1 5.000V 0.700V 4 Q 1 413 423 0.910V Ignore 0.030V 0.0010 71.117 155.51 0.9100 0.4900  
2459 QPQ706_3_1(N) 0.700V 0.700V 0 Q 1 413 0 0.910V 0.490V 0.620V 0.0021 32.891 20.164 0.9100 0.4900  
2460 QPQ706_3_1(N) 3000.0pF 200.00pF 2 C 423 413 0 Ignore 140.00pF 0.62pF 0.0021 32.891 20.164 0.9100 0.4900  

QPQ707
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ707 D1 T 3 3 100.0  

Pin Nail Net Name
1 971 P_VCCSA_B1_10
2 1 GND
3 970 P_VCCSA_C1_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2461 QPQ707_1_2 0.700V 0.700V 0 Q 971 1 0 0.910V 0.490V 0.780V 0.0002 367.50 232.44 0.9100 0.4900  
2462 QPQ707_2_3 1.500V 0.300V 4 Q 970 1 971 0.390V Ignore 0.050V 0.0006 49.539 88.852 0.3900 0.2100  
2463 QPQ707_3_1 0.700V 0.700V 0 Q 971 970 0 0.910V 0.490V 0.770V 0.0001 483.32 317.91 0.9100 0.4900  

QPQ709
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ709 B4 T 3 3 100.0  

Pin Nail Net Name
1 413 P_VCCST_VCCSFR_D1_10
2 426 VCCST_VCCSFR
3 449 +1_0V_A

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2464 QPQ709_1_2 3000.0pF 3000.0pF 2 C 413 426 0 Ignore 2100.0pF 20678.7pF 2.4822 120.86 2253.2 3900.0 2100.0  
2465 QPQ709_2_3_1 5.000V 0.700V 4 Q 426 449 413 0.910V Ignore 0.020V 0.0010 69.837 157.73 0.9100 0.4900  
2466 QPQ709_3_1(N) 0.700V 0.700V 0 Q 449 413 0 0.910V 0.490V 0.620V 0.0023 29.823 18.462 0.9100 0.4900  
2467 QPQ709_3_1(N) 3000.0pF 3000.0pF 2 C 413 449 0 Ignore 2100.0pF 0.6pF 0.0023 29.823 18.462 0.9100 0.4900  

QPQ710
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ710 D1 T 5 5 100.0  

Pin Nail Net Name
1 950 P_VCCSA_PHASE_20
2 950 P_VCCSA_PHASE_20
3 950 P_VCCSA_PHASE_20
4 963 P_VCCSA_UGATE_M_20
5 1325 P_VCORE_L+12V_S

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2468 QPQ710_3_4 3000.0pF 2000.0pF 2 C 950 963 0 Ignore 1400.0pF 1838.8pF 0.7390 270.63 197.93 2600.0 1400.0  
2469 QPQ710_4_5_1 5.000V 0.300V 4 Q 950 1325 963 0.390V Ignore -0.010V 0.0005 57.543 138.72 0.3900 0.2100  
2470 QPQ710_5_1(N) 0.700V 0.700V 1 Q 1325 963 0 0.910V 0.490V 0.590V 0.0246 2.8510 1.3030 0.9100 0.4900  
2471 QPQ710_5_1(N) 3000.0pF 2000.0pF 2 C 963 1325 0 Ignore 1400.0pF 0.6pF 0.0246 2.8510 1.3030 0.9100 0.4900  

QPQ711
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ711 D2 T 5 5 100.0  

Pin Nail Net Name
1 1 GND
2 1 GND
3 1 GND
4 959 P_VCCSA_LGATE_20
5 950 P_VCCSA_PHASE_20

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2472 QPQ711_3_4 3000.0pF 2000.0pF 2 C 959 1 0 Ignore 1400.0pF 2007.0pF 1.0143 197.18 194.89 2600.0 1400.0  
2473 QPQ711_4_5_1 5.000V 0.300V 4 Q 1 950 959 0.390V Ignore 0.040V 0.0178 1.6890 3.2760 0.3900 0.2100  
2474 QPQ711_5_1(N) 0.700V 0.700V 0 Q 959 950 0 0.910V 0.490V 0.760V 0.0329 2.1260 1.5380 0.9100 0.4900  
2475 QPQ711_5_1(N) 3000.0pF 2000.0pF 2 C 959 950 0 Ignore 1400.0pF 0.8pF 0.0329 2.1260 1.5380 0.9100 0.4900  

QPQ712
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ712 D1 T 3 3 100.0  

Pin Nail Net Name
1 970 P_VCCSA_C1_10
2 1 GND
3 969 P_VCCSA_COMP_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2476 QPQ712_1_2 3000.0pF 300.00pF 2 C 970 1 0 Ignore 210.00pF 892.76pF 2.0166 14.877 83.104 390.00 210.00  
2477 QPQ712_2_3_1 5.000V 0.700V 4 Q 1 969 970 0.910V Ignore 0.030V 0.0008 90.315 197.84 0.9100 0.4900  
2478 QPQ712_3_1(N) 0.700V 0.700V 0 Q 1 969 0 0.910V 0.490V 0.580V 0.0004 163.20 69.734 0.9100 0.4900  
2479 QPQ712_3_1(N) 3000.0pF 50.00pF 2 C 970 969 0 Ignore 35.00pF 0.58pF 0.0004 163.20 69.734 0.9100 0.4900  

QPQ771
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ771 B3 T 3 3 100.0  

Pin Nail Net Name
1 408 O_+12V_DUMMYLOAD2
2 1 GND
3 424 P_+12V_DUMMY_R2

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2489 QPQ771_1_2 3000.0pF 400.00pF 2 C 408 1 0 Ignore 280.00pF 971.98pF 1.3847 28.887 108.80 520.00 280.00  
2490 QPQ771_2_3_1 5.000V 0.700V 4 Q 1 424 408 0.910V Ignore 0.280V 0.0038 18.633 18.657 0.9100 0.4900  
2491 QPQ771_3_1(N) 0.700V 0.700V 1 Q 1 424 0 0.910V 0.490V 0.660V 0.0250 2.8010 2.3240 0.9100 0.4900  
2492 QPQ771_3_1(N) 3000.0pF 80.00pF 2 C 408 424 0 Ignore 56.00pF 0.66pF 0.0250 2.8010 2.3240 0.9100 0.4900  

QPQ801
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ801 F3 T 3 3 100.0  

Pin Nail Net Name
1 1231 P_VREN__10
2 1 GND
3 1236 P_VCORE_EN_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2496 QPQ801_1_2 3000.0pF 500.00pF 2 C 1231 1 0 Ignore 350.00pF 873.43pF 73.043 0.6850 1.0200 650.00 350.00  
2497 QPQ801_2_3_1 5.000V 0.700V 4 Q 1 1236 1231 0.910V Ignore 0.030V 0.0010 68.238 148.52 0.9100 0.4900  
2498 QPQ801_3_1(N) 0.700V 0.700V 1 Q 1 1236 0 0.910V 0.490V 0.670V 0.0011 63.324 54.275 0.9100 0.4900  
2499 QPQ801_3_1(N) 3000.0pF 400.00pF 2 C 1231 1236 0 Ignore 280.00pF 0.67pF 0.0011 63.324 54.275 0.9100 0.4900  

QPQ803
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ803 F3 T 3 3 100.0  

Pin Nail Net Name
1 1230 P_VREN_10
2 1 GND
3 1231 P_VREN__10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2500 QPQ803_1_2 3000.0pF 300.00pF 2 C 1230 1 0 Ignore 210.00pF 903.74pF 4.0530 7.4020 42.252 390.00 210.00  
2501 QPQ803_2_3_1 5.000V 0.700V 4 Q 1 1231 1230 0.910V Ignore 0.030V 0.0011 63.837 139.32 0.9100 0.4900  
2502 QPQ803_3_1(N) 0.700V 0.700V 0 Q 1 1231 0 0.910V 0.490V 0.610V 0.0042 16.721 9.2450 0.9100 0.4900  
2503 QPQ803_3_1(N) 3000.0pF 50.00pF 2 C 1230 1231 0 Ignore 35.00pF 0.61pF 0.0042 16.721 9.2450 0.9100 0.4900  

QPQ805
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ805 F3 T 3 3 100.0  

Pin Nail Net Name
1 1231 P_VREN__10
2 1 GND
3 384 P_VR_READY_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2504 QPQ805_1_2 3000.0pF 500.00pF 2 C 1231 1 0 Ignore 350.00pF 880.61pF 81.078 0.6170 0.9480 650.00 350.00  
2505 QPQ805_2_3_1 5.000V 0.700V 4 Q 1 384 1231 0.910V Ignore 0.040V 0.0003 234.44 505.64 0.9100 0.4900  
2506 QPQ805_3_1(N) 0.700V 0.700V 0 Q 1 384 0 0.910V 0.490V 0.560V 0.0061 11.402 3.5870 0.9100 0.4900  
2507 QPQ805_3_1(N) 3000.0pF 30.00pF 2 C 1231 384 0 Ignore 21.00pF 0.56pF 0.0061 11.402 3.5870 0.9100 0.4900  

QPQ806
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ806 F3 T 3 3 100.0  

Pin Nail Net Name
1 1227 P_+12V_3V_EN_C1_10
2 1 GND
3 1229 P_+12V_3V_EN_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2508 QPQ806_1_2 3000.0pF 300.00pF 2 C 1227 1 0 Ignore 210.00pF 865.51pF 2.9054 10.326 54.556 390.00 210.00  
2509 QPQ806_2_3_1 5.000V 0.700V 4 Q 1 1229 1227 0.910V Ignore 0.030V 0.0009 80.995 177.53 0.9100 0.4900  
2510 QPQ806_3_1(N) 0.700V 0.700V 1 Q 1 1229 0 0.910V 0.490V 0.660V 0.0024 29.150 24.124 0.9100 0.4900  
2511 QPQ806_3_1(N) 3000.0pF 40.00pF 2 C 1227 1229 0 Ignore 28.00pF 0.66pF 0.0024 29.150 24.124 0.9100 0.4900  

QPQ807
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ807 F3 T 3 3 100.0  

Pin Nail Net Name
1 1226 P_+12V_3V_EN_B1_10
2 1239 P_+12V_3V_EN_C2_10
3 1227 P_+12V_3V_EN_C1_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2512 QPQ807_1_2 0.700V 0.700V 0 Q 1226 1239 0 0.910V 0.490V 0.790V 0.0002 427.79 254.40 0.9100 0.4900  
2513 QPQ807_2_3 1.500V 0.300V 4 Q 1227 1239 1226 0.390V Ignore 0.050V 0.0007 43.026 74.613 0.3900 0.2100  
2514 QPQ807_3_1 0.700V 0.700V 0 Q 1226 1227 0 0.910V 0.490V 0.780V 0.0001 557.91 348.27 0.9100 0.4900  

QPQ808
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ808 F4 T 3 3 100.0  

Pin Nail Net Name
1 1235 P_VRM_PGD_10
2 1 GND
3 1234 P_VCORE_PG__10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2515 QPQ808_1_2 0.700V 0.700V 0 Q 1235 1 0 0.910V 0.490V 0.780V 0.0001 607.12 377.95 0.9100 0.4900  
2516 QPQ808_2_3 1.500V 0.300V 4 Q 1234 1 1235 0.390V Ignore 0.050V 0.0006 46.836 82.879 0.3900 0.2100  
2517 QPQ808_3_1 0.700V 0.700V 0 Q 1235 1234 0 0.910V 0.490V 0.770V 0.0002 329.68 212.40 0.9100 0.4900  

QPQ809
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ809 F3 T 3 3 100.0  

Pin Nail Net Name
1 1234 P_VCORE_PG__10
2 1 GND
3 384 P_VR_READY_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2518 QPQ809_1_2 3000.0pF 300.00pF 2 C 1234 1 0 Ignore 210.00pF 933.13pF 2.1980 13.649 82.367 390.00 210.00  
2519 QPQ809_2_3_1 5.000V 0.700V 4 Q 1 384 1234 0.910V Ignore 0.040V 0.0012 58.006 125.36 0.9100 0.4900  
2520 QPQ809_3_1(N) 0.700V 0.700V 0 Q 1 384 0 0.910V 0.490V 0.560V 0.0065 10.696 3.4820 0.9100 0.4900  
2521 QPQ809_3_1(N) 3000.0pF 20.00pF 2 C 1234 384 0 Ignore 14.00pF 0.56pF 0.0065 10.696 3.4820 0.9100 0.4900  

QPQ810
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ810 F3 T 3 3 100.0  

Pin Nail Net Name
1 1240 P_+12V_3V_EN_B2_10
2 1 GND
3 1239 P_+12V_3V_EN_C2_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2522 QPQ810_1_2 0.700V 0.700V 0 Q 1240 1 0 0.910V 0.490V 0.780V 0.0002 465.64 279.58 0.9100 0.4900  
2523 QPQ810_2_3 1.500V 0.300V 4 Q 1239 1 1240 0.390V Ignore 0.050V 0.0008 39.166 70.250 0.3900 0.2100  
2524 QPQ810_3_1 0.700V 0.700V 0 Q 1240 1239 0 0.910V 0.490V 0.780V 0.0002 404.48 252.80 0.9100 0.4900  

QPQ811
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ811 F4 T 3 3 100.0  

Pin Nail Net Name
1 1231 P_VREN__10
2 1 GND
3 788 P_+VCCIO_EN_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2525 QPQ811_1_2 3000.0pF 500.00pF 2 C 1231 1 0 Ignore 350.00pF 829.91pF 15.419 3.2430 3.8900 650.00 350.00  
2526 QPQ811_2_3_1 5.000V 0.700V 4 Q 1 788 1231 0.910V Ignore 0.040V 0.0011 61.260 132.62 0.9100 0.4900  
2527 QPQ811_3_1(N) 0.700V 0.700V 1 Q 1 788 0 0.910V 0.490V 0.670V 0.0015 46.582 39.032 0.9100 0.4900  
2528 QPQ811_3_1(N) 3000.0pF 30.00pF 2 C 1231 788 0 Ignore 21.00pF 0.67pF 0.0015 46.582 39.032 0.9100 0.4900  

QPQ815
Device Loc Side Total Pin Tested Coverage (%) Comment
QPQ815 C4 T 5 5 100.0  

Pin Nail Net Name
1 3 +5V
2 3 +5V
3 3 +5V
4 790 P_5V_USB_GATE_10
5 107 +5VSB_DUAL

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2529 QPQ815_3_4 3000.0pF 1200.0pF 2 C 790 3 0 Ignore 840.0pF 1266.0pF 4.5402 26.431 21.586 1560.0 840.00  
2530 QPQ815_4_5_1 5.000V 0.300V 4 Q 3 107 790 0.390V Ignore 0.010V 0.0015 20.251 45.285 0.3900 0.2100  
2531 QPQ815_5_1(N) 0.700V 0.700V 1 Q 3 107 0 0.910V 0.490V 0.630V 0.0049 14.313 9.5690 0.9100 0.4900  
2532 QPQ815_5_1(N) 3000.0pF 1200.0pF 2 C 790 107 0 Ignore 840.0pF 0.6pF 0.0049 14.313 9.5690 0.9100 0.4900  

QPU702
Device Loc Side Total Pin Tested Coverage (%) Comment
QPU702 B2 T 3 3 100.0  

Pin Nail Net Name
1 522 P_+3VSB_ATX_ADJ_20
2 399 +3VSB_ATX
3 797 +5VSB_ATX

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2536 QPU702_1_2 0.700V 0.700V 0 Q 522 399 0 0.910V 0.490V 0.760V 0.0002 381.83 273.76 0.9100 0.4900  
2537 QPU702_2_3 0.467V 0.467V 1 Q 797 399 0 0.607V 0.327V 0.450V 0.0006 81.091 69.453 0.6100 0.3300  
2538 QPU702_3_1 1.321V 1.321V 0 Q 522 797 0 1.717V 0.925V 1.290V 0.0068 19.327 17.904 1.7200 0.9200  

QSQ1
Device Loc Side Total Pin Tested Coverage (%) Comment
QSQ1 A4 T 3 3 100.0  

Pin Nail Net Name
1 338 N18147149
2 712 S_SMBCLK_MAIN
3 330 S_SMBCLK_VSB

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2542 QSQ1_1_2 3000.0pF 50.00pF 2 C 338 712 0 Ignore 35.00pF 59.86pF 0.1495 33.442 11.466 65.000 35.000  
2543 QSQ1_2_3_1(N) 5.000V 0.700V 4 Q 712 330 338 0.910V Ignore 0.050V 0.0014 49.151 103.06 0.9100 0.4900  
2544 QSQ1_3_1 0.700V 0.700V 0 Q 712 330 0 0.910V 0.490V 0.650V 0.0016 43.476 32.146 0.9100 0.4900  
2545 QSQ1_3_1 3000.0pF 50.00pF 2 C 338 330 0 Ignore 35.00pF 0.65pF 0.0016 43.476 32.146 0.9100 0.4900  

QSQ2
Device Loc Side Total Pin Tested Coverage (%) Comment
QSQ2 A4 T 3 3 100.0  

Pin Nail Net Name
1 338 N18147149
2 770 S_SMBDATA_MAIN
3 329 S_SMBDATA_VSB

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2549 QSQ2_1_2 3000.0pF 50.00pF 2 C 338 770 0 Ignore 35.00pF 59.50pF 0.1449 34.501 12.651 65.000 35.000  
2550 QSQ2_2_3_1(N) 5.000V 0.300V 4 Q 770 329 338 0.390V Ignore 0.050V 0.0005 64.254 113.22 0.3900 0.2100  
2551 QSQ2_3_1 0.700V 0.700V 0 Q 770 329 0 0.910V 0.490V 0.640V 0.0009 80.708 56.663 0.9100 0.4900  
2552 QSQ2_3_1 3000.0pF 50.00pF 2 C 338 329 0 Ignore 35.00pF 0.64pF 0.0009 80.708 56.663 0.9100 0.4900  

QSQ46
Device Loc Side Total Pin Tested Coverage (%) Comment
QSQ46 A4 T 3 3 100.0  

Pin Nail Net Name
1 331 N45063647
2 304 S_SATALED__R
3 345 HDLED-

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2568 QSQ46_1_2 0.700V 0.700V 0 Q 331 304 0 0.910V 0.490V 0.790V 0.0001 705.99 414.52 0.9100 0.4900  
2569 QSQ46_2_3 1.500V 0.300V 4 Q 345 304 331 0.390V Ignore 0.060V 0.0008 37.678 64.287 0.3900 0.2100  
2570 QSQ46_3_1 0.700V 0.700V 0 Q 331 345 0 0.910V 0.490V 0.780V 0.0001 654.48 404.14 0.9100 0.4900  

QSQ6
Device Loc Side Total Pin Tested Coverage (%) Comment
QSQ6 A4 T 3 3 100.0  

Pin Nail Net Name
1 384 P_VR_READY_10
2 325 N97614572
3 328 N35695809

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2586 QSQ6_1_2 3000.0pF 2000.0pF 2 C 384 325 0 Ignore 1400.0pF 1974.8pF 5.9629 33.541 32.132 2600.0 1400.0  
2587 QSQ6_2_3_1(N) 5.000V 0.700V 4 Q 325 328 384 0.910V Ignore 0.310V 0.0016 44.334 37.418 0.9100 0.4900  
2588 QSQ6_3_1 0.700V 0.700V 0 Q 325 328 0 0.910V 0.490V 0.600V 0.0012 59.764 32.653 0.9100 0.4900  
2589 QSQ6_3_1 3000.0pF 30.00pF 2 C 384 328 0 Ignore 21.00pF 0.60pF 0.0012 59.764 32.653 0.9100 0.4900  

QSQ9
Device Loc Side Total Pin Tested Coverage (%) Comment
QSQ9 A4 T 3 3 100.0  

Pin Nail Net Name
1 328 N35695809
2 1 GND
3 410 S_VCCST_PWRGD

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2620 QSQ9_1_2 3000.0pF 700.00pF 2 C 328 1 0 Ignore 490.00pF 945.68pF 0.7467 93.743 15.926 910.00 490.00  
2621 QSQ9_2_3_1(N) 5.000V 0.700V 4 Q 1 410 328 0.910V Ignore 0.040V 0.0010 72.852 157.65 0.9100 0.4900  
2622 QSQ9_3_1 0.700V 0.700V 1 Q 1 410 0 0.910V 0.490V 0.680V 0.0038 18.272 16.303 0.9100 0.4900  
2623 QSQ9_3_1 3000.0pF 30.00pF 2 C 328 410 0 Ignore 21.00pF 0.68pF 0.0038 18.272 16.303 0.9100 0.4900  

QSQ901
Device Loc Side Total Pin Tested Coverage (%) Comment
QSQ901 B4 T 3 3 100.0  

Pin Nail Net Name
1 261 S_GPP_D11
2 1 GND
3 705 P_+VCCSAIO_OV__2_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2596 QSQ901_1_2 3000.0pF 300.00pF 2 C 261 1 0 Ignore 210.00pF 939.74pF 2.0260 14.808 90.450 390.00 210.00  
2597 QSQ901_2_3_1 5.000V 0.700V 4 Q 1 705 261 0.910V Ignore 0.270V 0.0081 8.6060 9.0140 0.9100 0.4900  
2598 QSQ901_3_1(N) 0.700V 0.700V 0 Q 1 705 0 0.910V 0.490V 0.610V 0.0000 4036.8 2238.2 0.9100 0.4900  
2599 QSQ901_3_1(N) 3000.0pF 30.00pF 2 C 261 705 0 Ignore 21.00pF 0.61pF 0.0000 4036.8 2238.2 0.9100 0.4900  

QSQ902
Device Loc Side Total Pin Tested Coverage (%) Comment
QSQ902 A4 T 3 3 100.0  

Pin Nail Net Name
1 307 S_GPP_D12
2 1 GND
3 425 P_+VCCSAIO_OV__1_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2600 QSQ902_1_2 3000.0pF 300.00pF 2 C 307 1 0 Ignore 210.00pF 923.41pF 5.0318 5.9620 35.336 390.00 210.00  
2601 QSQ902_2_3_1 5.000V 0.700V 4 Q 1 425 307 0.910V Ignore 0.250V 0.0126 5.5660 6.3380 0.9100 0.4900  
2602 QSQ902_3_1(N) 0.700V 0.700V 1 Q 1 425 0 0.910V 0.490V 0.660V 0.0020 34.461 27.336 0.9100 0.4900  
2603 QSQ902_3_1(N) 3000.0pF 30.00pF 2 C 307 425 0 Ignore 21.00pF 0.66pF 0.0020 34.461 27.336 0.9100 0.4900  

QSQ903
Device Loc Side Total Pin Tested Coverage (%) Comment
QSQ903 A4 T 3 3 100.0  

Pin Nail Net Name
1 281 S_GPP_D16
2 1 GND
3 392 P_+1_0V_A_OV1_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2604 QSQ903_1_2 3000.0pF 300.00pF 2 C 281 1 0 Ignore 210.00pF 931.42pF 1.7584 17.061 102.64 390.00 210.00  
2605 QSQ903_2_3_1 5.000V 0.700V 4 Q 1 392 281 0.910V Ignore 0.260V 0.0107 6.5340 7.2010 0.9100 0.4900  
2606 QSQ903_3_1(N) 0.700V 0.700V 0 Q 1 392 0 0.910V 0.490V 0.600V 0.0001 1223.7 656.27 0.9100 0.4900  
2607 QSQ903_3_1(N) 3000.0pF 30.00pF 2 C 281 392 0 Ignore 21.00pF 0.60pF 0.0001 1223.7 656.27 0.9100 0.4900  

QSQ905
Device Loc Side Total Pin Tested Coverage (%) Comment
QSQ905 B4 T 3 3 100.0  

Pin Nail Net Name
1 396 S_GPP_G2
2 1 GND
3 360 P_+VDDQ_OV_1_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2608 QSQ905_1_2 3000.0pF 700.00pF 2 C 396 1 0 Ignore 490.00pF 922.06pF 3.0766 22.752 1.3060 910.00 490.00  
2609 QSQ905_2_3_1 5.000V 0.700V 4 Q 1 360 396 0.910V Ignore 0.260V 0.0094 7.4470 8.2770 0.9100 0.4900  
2610 QSQ905_3_1(N) 0.700V 0.700V 0 Q 1 360 0 0.910V 0.490V 0.610V 0.0001 1106.4 639.78 0.9100 0.4900  
2611 QSQ905_3_1(N) 3000.0pF 30.00pF 2 C 396 360 0 Ignore 21.00pF 0.61pF 0.0001 1106.4 639.78 0.9100 0.4900  

QSQ906
Device Loc Side Total Pin Tested Coverage (%) Comment
QSQ906 B4 T 3 3 100.0  

Pin Nail Net Name
1 394 S_GPP_G3
2 1 GND
3 369 P_+VDDQ_OV_2_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2612 QSQ906_1_2 3000.0pF 700.00pF 2 C 394 1 0 Ignore 490.00pF 925.99pF 3.2575 21.489 1.6360 910.00 490.00  
2613 QSQ906_2_3_1 5.000V 0.300V 4 Q 1 369 394 0.390V Ignore 0.240V 0.0091 3.3000 0.9670 0.3900 0.2100  
2614 QSQ906_3_1(N) 0.700V 0.700V 0 Q 1 369 0 0.910V 0.490V 0.600V 0.0002 441.41 237.07 0.9100 0.4900  
2615 QSQ906_3_1(N) 3000.0pF 30.00pF 2 C 394 369 0 Ignore 21.00pF 0.60pF 0.0002 441.41 237.07 0.9100 0.4900  

QSQ907
Device Loc Side Total Pin Tested Coverage (%) Comment
QSQ907 B4 T 3 3 100.0  

Pin Nail Net Name
1 397 S_GPP_G4
2 1 GND
3 393 P_+VDDQ_OV_3_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2616 QSQ907_1_2 3000.0pF 700.00pF 2 C 397 1 0 Ignore 490.00pF 922.22pF 1.3692 51.123 2.9750 910.00 490.00  
2617 QSQ907_2_3_1 5.000V 0.700V 4 Q 1 393 397 0.910V Ignore 0.240V 0.0110 6.3680 7.7130 0.9100 0.4900  
2618 QSQ907_3_1(N) 0.700V 0.700V 0 Q 1 393 0 0.910V 0.490V 0.600V 0.0001 552.53 293.25 0.9100 0.4900  
2619 QSQ907_3_1(N) 3000.0pF 30.00pF 2 C 397 393 0 Ignore 21.00pF 0.60pF 0.0001 552.53 293.25 0.9100 0.4900  

QUQ700
Device Loc Side Total Pin Tested Coverage (%) Comment
QUQ700 B4 T 3 3 100.0  

Pin Nail Net Name
1 383 P_5V_USB_Q1_10
2 107 +5VSB_DUAL
3 364 N03812

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2624 QUQ700_1_2 0.700V 0.700V 0 Q 383 107 0 0.910V 0.490V 0.780V 0.0001 1022.2 623.41 0.9100 0.4900  
2625 QUQ700_2_3 1.500V 0.300V 4 Q 364 107 383 0.390V Ignore 0.050V 0.0006 52.034 92.717 0.3900 0.2100  
2626 QUQ700_3_1 0.700V 0.700V 0 Q 383 364 0 0.910V 0.490V 0.780V 0.0001 565.71 358.26 0.9100 0.4900  

QUQ702
Device Loc Side Total Pin Tested Coverage (%) Comment
QUQ702 C4 T 3 3 100.0  

Pin Nail Net Name
1 363 P_5V_USB_Q2_10
2 1 GND
3 790 P_5V_USB_GATE_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2627 QUQ702_1_2 0.700V 0.700V 0 Q 363 1 0 0.910V 0.490V 0.780V 0.0002 405.43 246.95 0.9100 0.4900  
2628 QUQ702_2_3 1.500V 0.300V 4 Q 790 1 363 0.390V Ignore 0.050V 0.0014 20.797 37.168 0.3900 0.2100  
2629 QUQ702_3_1 0.700V 0.700V 0 Q 363 790 0 0.910V 0.490V 0.780V 0.0001 519.35 328.23 0.9100 0.4900  

QUQ703
Device Loc Side Total Pin Tested Coverage (%) Comment
QUQ703 B4 T 3 3 100.0  

Pin Nail Net Name
1 362 P_5V_USB_Q3_10
2 1 GND
3 376 P_5VSB_USB_GATE_10_1

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2630 QUQ703_1_2 0.700V 0.700V 0 Q 362 1 0 0.910V 0.490V 0.780V 0.0001 592.65 360.35 0.9100 0.4900  
2631 QUQ703_2_3 1.500V 0.300V 4 Q 376 1 362 0.390V Ignore 0.050V 0.0008 39.895 70.982 0.3900 0.2100  
2632 QUQ703_3_1 0.700V 0.700V 0 Q 362 376 0 0.910V 0.490V 0.780V 0.0001 587.36 369.81 0.9100 0.4900  

QUQ705
Device Loc Side Total Pin Tested Coverage (%) Comment
QUQ705 C4 T 3 3 100.0  

Pin Nail Net Name
1 361 P_5VSB_USB_GATE_10
2 107 +5VSB_DUAL
3 797 +5VSB_ATX

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2633 QUQ705_1_2 3000.0pF 1300.0pF 2 C 361 107 0 Ignore 910.0pF 1373.6pF 5.3212 24.430 19.821 1690.0 910.00  
2634 QUQ705_2_3_1 5.000V 0.300V 3 Q 107 797 361 0.390V Ignore 0.020V 0.0007 40.740 86.543 0.3900 0.2100  
2635 QUQ705_3_1(P) 0.700V 0.700V 1 Q 107 797 0 0.910V 0.490V 0.650V 0.0022 32.036 24.975 0.9100 0.4900  
2636 QUQ705_3_1(P) 3000.0pF 1300.0pF 2 C 361 797 0 Ignore 910.0pF 0.6pF 0.0022 32.036 24.975 0.9100 0.4900  

QUQ730
Device Loc Side Total Pin Tested Coverage (%) Comment
QUQ730 A4 T 3 3 100.0  

Pin Nail Net Name
1 327 P_USBPWR_SW
2 1 GND
3 383 P_5V_USB_Q1_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2637 QUQ730_1_2 3000.0pF 700.00pF 2 C 327 1 0 Ignore 490.00pF 895.57pF 4.3593 16.058 1.1030 910.00 490.00  
2638 QUQ730_2_3_1 5.000V 0.700V 4 Q 1 383 327 0.910V Ignore 0.030V 0.0011 64.523 140.87 0.9100 0.4900  
2639 QUQ730_3_1(N) 0.700V 0.700V 0 Q 1 383 0 0.910V 0.490V 0.580V 0.0005 128.96 53.168 0.9100 0.4900  
2640 QUQ730_3_1(N) 3000.0pF 30.00pF 2 C 327 383 0 Ignore 21.00pF 0.58pF 0.0005 128.96 53.168 0.9100 0.4900  

QUQ750
Device Loc Side Total Pin Tested Coverage (%) Comment
QUQ750 C4 T 3 3 100.0  

Pin Nail Net Name
1 382 N16726466
2 791 N16717470
3 797 +5VSB_ATX

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2644 QUQ750_1_2 0.700V 0.700V 0 Q 382 791 0 0.910V 0.490V 0.780V 0.0001 758.33 452.29 0.9100 0.4900  
2645 QUQ750_2_3 1.500V 0.300V 4 Q 797 791 382 0.390V Ignore 0.050V 0.0009 33.719 59.138 0.3900 0.2100  
2646 QUQ750_3_1 0.700V 0.700V 0 Q 382 797 0 0.910V 0.490V 0.780V 0.0001 481.96 300.83 0.9100 0.4900  

QUQ751
Device Loc Side Total Pin Tested Coverage (%) Comment
QUQ751 B4 T 3 3 100.0  

Pin Nail Net Name
1 375 N16728729
2 1 GND
3 374 N16718199

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2647 QUQ751_1_2 0.700V 0.700V 0 Q 375 1 0 0.910V 0.490V 0.780V 0.0002 424.15 255.79 0.9100 0.4900  
2648 QUQ751_2_3 1.500V 0.300V 4 Q 374 1 375 0.390V Ignore 0.050V 0.0011 27.495 49.196 0.3900 0.2100  
2649 QUQ751_3_1 0.700V 0.700V 0 Q 375 374 0 0.910V 0.490V 0.780V 0.0002 418.19 262.05 0.9100 0.4900  

QUQ756
Device Loc Side Total Pin Tested Coverage (%) Comment
QUQ756 B4 T 3 3 100.0  

Pin Nail Net Name
1 339 N16728809
2 1 GND
3 375 N16728729

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2650 QUQ756_1_2 0.700V 0.700V 0 Q 339 1 0 0.910V 0.490V 0.790V 0.0002 328.11 194.07 0.9100 0.4900  
2651 QUQ756_2_3 1.500V 0.300V 4 Q 375 1 339 0.390V Ignore 0.050V 0.0007 41.852 75.154 0.3900 0.2100  
2652 QUQ756_3_1 0.700V 0.700V 0 Q 339 375 0 0.910V 0.490V 0.780V 0.0002 398.00 244.88 0.9100 0.4900  

QUQ757
Device Loc Side Total Pin Tested Coverage (%) Comment
QUQ757 A4 T 3 3 100.0  

Pin Nail Net Name
1 271 S_PWROK
2 1 GND
3 339 N16728809

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2653 QUQ757_1_2 3000.0pF 3000.0pF 2 C 271 1 0 Ignore 2100.0pF 2698.2pF 6.9833 42.960 28.554 3900.0 2100.0  
2654 QUQ757_2_3_1 5.000V 0.700V 4 Q 1 339 271 0.910V Ignore 0.100V 0.0002 322.07 596.53 0.9100 0.4900  
2655 QUQ757_3_1(N) 0.700V 0.700V 0 Q 1 339 0 0.910V 0.490V 0.590V 0.0013 55.523 27.143 0.9100 0.4900  
2656 QUQ757_3_1(N) 3000.0pF 30.00pF 2 C 271 339 0 Ignore 21.00pF 0.59pF 0.0013 55.523 27.143 0.9100 0.4900  

QUQ759
Device Loc Side Total Pin Tested Coverage (%) Comment
QUQ759 B4 T 3 3 100.0  

Pin Nail Net Name
1 411 O_DEEP_S5
2 1 GND
3 383 P_5V_USB_Q1_10

Step Name BOM_V EXP_V Mode Type HiN LoN G1 HVal LVal Mean StdDev Cp Cpk USL LSL Message
2657 QUQ759_1_2 3000.0pF 1000.0pF 2 C 411 1 0 Ignore 700.0pF 1099.9pF 2.8039 35.664 23.784 1300.0 700.00  
2658 QUQ759_2_3_1 5.000V 0.700V 4 Q 1 383 411 0.910V Ignore 0.040V 0.0007 98.128 211.88 0.9100 0.4900  
2659 QUQ759_3_1(N) 0.700V 0.700V 1 Q 1 383 0 0.910V 0.490V 0.680V 0.0004 159.08 145.15 0.9100 0.4900  
2660 QUQ759_3_1(N) 3000.0pF 20.00pF 2 C 411 383 0 Ignore 14.00pF 0.68pF 0.0004 159.08 145.15 0.9100 0.4900